TR4 User Manual
1
www.terasic.com
March 18, 2014
CONTENTS
CHAPTER 1
OVERVIEW
........................................................................................................................................ 1
1.1 G
ENERAL
D
ESCRIPTION
............................................................................................................................................ 1
1.2 K
EY
F
EATURES
.......................................................................................................................................................... 2
1.3 B
OARD
O
VERVIEW
.................................................................................................................................................... 3
1.4 B
LOCK
D
IAGRAM
...................................................................................................................................................... 4
1.5 A
SSEMBLY
................................................................................................................................................................. 8
CHAPTER 2
USING THE TR4 BOARD
.............................................................................................................. 10
2.1 C
ONFIGURATION
O
PTIONS
...................................................................................................................................... 10
2.2 S
ETUP
E
LEMENTS
.................................................................................................................................................... 17
2.3 S
TATUS
E
LEMENTS
.................................................................................................................................................. 18
2.4 G
ENERAL
U
SER
I
NPUT
/O
UTPUT
.............................................................................................................................. 19
2.5 H
IGH
-S
PEED
M
EZZANINE
C
ARDS
............................................................................................................................ 21
2.6 GPIO E
XPANSION
H
EADERS
................................................................................................................................... 34
2.7 DDR3 SO-DIMM ................................................................................................................................................... 38
2.8 C
LOCK
C
IRCUITRY
.................................................................................................................................................. 42
2.9 PCI E
XPRESS
.......................................................................................................................................................... 47
2.10 F
LASH
M
EMORY
................................................................................................................................................... 50
2.11 SSRAM M
EMORY
................................................................................................................................................. 53
2.12 T
EMPERATURE
S
ENSOR AND
F
AN
.......................................................................................................................... 55
2.13 P
OWER
.................................................................................................................................................................. 55
2.14 S
ECURITY
.............................................................................................................................................................. 56
CHAPTER 3
CONTROL PANEL
.......................................................................................................................... 57
3.1 C
ONTROL
P
ANEL
S
ETUP
.......................................................................................................................................... 57
3.2 C
ONTROLLING THE
LED
S
....................................................................................................................................... 61
3.3 S
WITCHES AND
P
USH
-B
UTTONS
.............................................................................................................................. 62
3.4 M
EMORY
C
ONTROLLER
........................................................................................................................................... 63
3.5 T
EMPERATURE
M
ONITOR
........................................................................................................................................ 66
3.6 PLL ........................................................................................................................................................................ 67
3.7 HSMC .................................................................................................................................................................... 68
3.8 F
AN
......................................................................................................................................................................... 69
TR4 User Manual
www.terasic.com
March 18, 2014
I
3.9 I
NFORMATION
......................................................................................................................................................... 70
CHAPTER 4
TR4 SYSTEM BUILDER
................................................................................................................ 72
4.1 I
NTRODUCTION
....................................................................................................................................................... 72
4.2 G
ENERAL
D
ESIGN
F
LOW
......................................................................................................................................... 73
4.3 U
SING
TR4 S
YSTEM
B
UILDER
................................................................................................................................. 74
CHAPTER 5
EXAMPLES OF ADVANCED DEMONSTRATION
...................................................................... 84
5.1 B
REATHING
LED
S
................................................................................................................................................... 84
5.2 E
XTERNAL
C
LOCK
G
ENERATOR
.............................................................................................................................. 85
5.3 H
IGH
S
PEED
M
EZZANINE
C
ARD
(HSMC) ............................................................................................................... 91
5.4 DDR3 SDRAM (1GB) ........................................................................................................................................... 93
5.5 DDR3 SDRAM (4GB) ........................................................................................................................................... 97
CHAPTER 6
PCI EXPRESS REFERENCE DESIGN
..................................................................................... 101
6.1 PCI E
XPRESS
S
YSTEM
I
NFRASTRUCTURE
.............................................................................................................. 101
6.2 FPGA PCI E
XPRESS
S
YSTEM
D
ESIGN
................................................................................................................... 102
6.3 PC PCI E
XPRESS
S
YSTEM
D
ESIGN
........................................................................................................................ 106
6.4 PCI
E
F
UNDAMENTAL
C
OMMUNICATION
................................................................................................................ 116
6.5 I
MAGE
P
ROCESSING
A
PPLICATION
......................................................................................................................... 121
CHAPTER 7
APPENDIX A: HSMC PIN ASSIGNMENT
................................................................................... 127
ADDITIONAL INFORMATION
................................................................................................................................... 145
TR4 User Manual
II
www.terasic.com
March 18, 2014
Chapter 1
Overview
This chapter provides an overview of the TR4 Development Board and details the components and
features of the board.
1.1 General Description
The TR4 Development Board provides the ideal hardware platform for system designs that demand
high-performance, serial connectivity, and advanced memory interfacing. Developed specifically to
address the rapidly evolving requirements in many end markets for greater bandwidth, improved
jitter performance, and lower power consumption, the TR4 is powered by the Stratix® IV GX
device and supported by industry-standard peripherals, connectors and interfaces that offer a rich set
of features that is suitable for a wide range of compute-intensive applications.
The advantages of the Stratix® IV GX FPGA platform with integrated transceivers have allowed
the TR4 to be fully compliant with version 2.0 of the PCI Express standard. This will accelerate
mainstream development of PCI Express-based applications and enable customers to deploy
designs for a broad range of high-speed connectivity applications.
The TR4 is supported by multiple reference designs and six High-Speed Mezzanine Card (HSMC)
connectors that allow scaling and customization with mezzanine daughter cards. For large-scale
ASIC prototype development, multiple TR4s can be stacked together to create an
easily-customizable multi-FPGA system.
TR4 User Manual
1
www.terasic.com
March 18, 2014
1.2 Key Features
Featured Device
o
Altera Stratix® IV GX FPGA (EP4SGX230C2/EP4SGX530C2)
Configuration and Set-up Elements
o
Built-in USB Blaster circuit for programming
o
Fast passive parallel (FPP) configuration via MAX II CPLD and FLASH
Components and Interfaces
o
Six HSMC connectors (two with transceiver support)
o
Two 40-pin GPIO expansion headers (shares pins with HSMC Port C)
o
Two external PCI Express 2.0 (x4 lane) connectors
Memory
o
DDR3 SO-DIMM socket (4GB Max)
o
64MB FLASH
o
2MB SSRAM
General User Input/Output:
o
Four LEDs
o
Four push-buttons
o
Four slide switches
Clock system
o
On-board 50MHz oscillator
o
Three on-board programmable PLL timing chips
o
SMA connector pair for differential clock input
o
SMA connector pair for differential clock output
o
SMA connector for external clock input
o
SMA connector for clock output
Other
o
Temperature sensor
o
FPGA cooling fan
TR4 User Manual
2
www.terasic.com
March 18, 2014
